The present invention relates to a package design for an LOC type semiconductor device, and specifically, it relates to a package design for an LOC type semiconductor device that has superior heat dissipation properties.
By means of developing miniaturized processing technology, a path is being pursued wherein the number of elements that can be integrated in a single semiconductor integrated circuit device has increased. According to current 0.35-0.18 xcexcm layout rules, the mounting of roughly several million transistors within a semiconductor chip several tens of mm square is possible. The increase in the number of transistors per unit surface area brings about a change to high-speed, high-performance semiconductor devices, and large-capacity semiconductor memory.
On the other hand, since each transistor in the semiconductor chip radiates heat, when the integration level is increased, the problems of heat generation become more serious. The heat within the semiconductor chip influences the movement of electrons within it and there are instances when erroneous operation of the semiconductor chip occurs.
LOC (Lead On Chip) is a package design that is equipped with a lead frame that is formed on the principal surface of the semiconductor chip, in other words, the surface on which circuit elements and electrode pads are formed, and is mainly used in semiconductor memory devices. In the LOC package, most of the region for the semiconductor chip and lead frame is covered by means of resin or other package material. The package material fulfills an important protects the semiconductor chip from contaminated air, but, on the other hand, creates the problem that the heat from the semiconductor chip will be sealed in and that the possibility of erroneous operation of the above-mentioned semiconductor device will increase. In a semiconductor memory device, the power consumption in current 64 MB DRAM (Dynamic Random-Access Memory) is about 300 mW, and the thermal resistance is about 60 EC/W. In the 256 MB synchronous DRAM of the next generation, it is assumed that the power consumption will increase to about 2 W, and the problem of heat dissipation is thus expected to be one order of magnitude greater.
Against this background, the combined efforts for the purpose of externally releasing the heat that is generated by the semiconductor chip are continuing. One solution requires a heat sink, a metal plate with multiple ribs, to be installed on the upper portion of the package material. However, since the already existing packaging material is present in between the semiconductor chip and the heat sink, and efficiently pulls down the internal thermal resistance, the heat sink must be greatly changed. In fulfilling the requirements for the miniaturization of the electronic equipment in which the semiconductor device is mounted, the presence of the heat sink becomes a great problem.
Also, the construction wherein one portion of the semiconductor chip such as one portion of the CSP (Chip Size Package) is exposed outside the package material is extremely effective in lowering the internal heat resistance. However, since the integration level of the semiconductor device will continue to rise, a means of further improving the heat radiating efficiency becomes important.
The purpose of the present invention is to offer a package design for an a LOC type semiconductor device that can dissipate a greater amount of heat than current designs.
Another purpose of the present invention is to improve thermal dissipation without increasing the size of the package.
The present invention relates to a package design for an LOC type semiconductor device that has a superior thermal dissipation. The semiconductor device of the present invention has a preferably metal heat-radiating element that is in thermal contact with the surface opposite the principal surface of the semiconductor chip. One area of said heat-radiating element is externally exposed from the package material enclosing the semiconductor chip. As a result, the heat generated in the semiconductor chip is efficiently transferred to the above-mentioned heat-radiating element, and is further externally discharged from said exposed region.
Here, the above-mentioned heat-radiating element is exposed on the bottom of the semiconductor device, and preferably, it is in thermal contact with the substrate on which the semiconductor device is mounted, preferably, with a metal pattern formed thereon. The heat from the semiconductor chip is transferred to the mounting substrate and is more efficiently dissipated.
The present invention also offers a semiconductor device manufacturing method that is equipped with the above-mentioned heat-radiating element. In other words, its manufacturing method includes a process for forming on the surface opposite to the principal surface of the semiconductor chip an element for adhering heat-radiating element with which the heat from said semiconductor chip can externally escape, a process for arranging, on the principal surface of the above-mentioned semiconductor chip, multiple conductive leads that extend outward for the purpose of connecting one of the ends of each lead to an external section and electrically connecting each of the other ends of the above-mentioned conductive leads to the above-mentioned semiconductor chip, and a process for sealing the above-mentioned semiconductor chip by means of a package element in a configuration in which one portion of the above-mentioned heat-radiating element is externally exposed.
Here, the process for forming an element with which the heat-radiating element is adhered to the above-mentioned semiconductor chip includes a process for adhering a heat-radiating material on one surface of the semiconductor wafer and a process for cutting the above-mentioned heat radiating material along with the above-mentioned semiconductor wafer to the dimensions of the semiconductor chip.